The Cache Arms Race Just Got Real
AMD has owned the cache conversation for years now. Ever since the Ryzen 7 5800X3D landed and started punching way above its weight in gaming, Intel has been on the back foot. Arrow Lake didn’t help. It launched with decent multi-threaded numbers but couldn’t close the gap where it mattered most to enthusiasts: gaming and latency-sensitive workloads.
So Intel is doing something different with Nova Lake-S. The company is bringing its own large-cache strategy to desktop CPUs for the first time, and it’s called bLLC, or Big Last Level Cache. The idea is straightforward: pack significantly more L3 cache onto the compute tile and go after AMD’s 3D V-Cache advantage directly. And based on the latest leaks, the numbers are big enough to make this rivalry genuinely interesting again.

What Is Intel Nova Lake-S bLLC and How Does It Work?
How Does Intel’s bLLC Compare to AMD’s 3D V-Cache?
Here’s the thing. AMD and Intel are solving the same problem, just from different directions. AMD’s 3D V-Cache stacks extra SRAM vertically on top of (or below) the compute die using through-silicon vias. Intel’s bLLC takes a different approach: it expands the cache directly on the compute tile itself, making the die physically larger to accommodate the extra L3.
One key advantage Intel has here is symmetry. On dual compute tile Nova Lake-S chips, both tiles get bLLC. AMD historically only put 3D V-Cache on one of its two CCDs, which created scheduling headaches. You’d sometimes need tools like Process Lasso to make sure your game was actually running on the cached chiplet. AMD’s brand new Ryzen 9 9950X3D2 fixes this by putting V-Cache on both CCDs, but it took years to get there.
The Numbers That Matter
The Intel Nova Lake-S bLLC configurations break down like this, based on recent leaks from Jaykihn:
- Single compute tile models: up to 144 MB of bLLC
- Dual compute tile models: up to 288 MB of bLLC
- Standard (non-bLLC) compute tile: 98mm². bLLC tile: 154mm². That’s a 57% larger die.
For context, Arrow Lake’s flagship topped out at 36 MB of L3. So we’re looking at a fourfold increase in a single generation. That’s a massive jump, and it signals just how seriously Intel is taking AMD’s cache lead.
How Does Nova Lake-S bLLC Stack Up Against AMD’s Ryzen 9950X3D2?
This is where the rivalry gets fun. AMD just launched the Ryzen 9 9950X3D2 Dual Edition on April 22 at $899. It’s their first mainstream desktop chip with 3D V-Cache on both CCDs, packing 208 MB of total cache (including L2). It’s the current king.
Intel’s top Nova Lake-S bLLC model is expected to hit 288 MB. That’s roughly 38% more total cache than what AMD is offering right now. Even the 264 MB variant would carry a 27% advantage.
But raw cache numbers don’t tell the whole story. Here’s what else matters:
Intel Nova Lake-S: Built on TSMC’s N2P process. New LGA 1954 socket. Up to 52 cores (16P + 32E + 4 LPE). TDP ranges from 125W to 175W for enthusiast models, though leaked power limits for dual tile configs have shown numbers well above 400W under unrestricted scenarios. Expected in H2 2026.
AMD Ryzen 9 9950X3D2: Zen 5 architecture. AM5 socket (drop-in upgrade for existing boards). 16 cores, 32 threads. 200W TDP. $899. Available now.
That socket difference is a big deal. If you’re already on AM5, the 9950X3D2 is a straightforward upgrade. Nova Lake-S means a new motherboard, new socket, and likely a higher total platform cost. For builders weighing their options, that matters.

Does More Cache Actually Mean Better Gaming?
Honestly, this is the question that matters most for the Intel vs AMD rivalry. Cache helps because it keeps data closer to the cores, reducing the need to reach out to slower system memory. For games, where frame times are sensitive to memory latency, more cache can translate directly into smoother performance.
AMD proved this with the X3D lineup. The 9800X3D regularly beats chips with higher clock speeds and more cores simply because of that extra cache. It just works for gaming.
Intel’s leaked performance testing suggests Nova Lake-S bLLC could deliver 30 to 45% better gaming performance over Arrow Lake. That’s a significant jump, but keep in mind, these are Intel’s own internal projections, not independent real-world benchmarks.
There’s also a practical limitation: games will likely only benefit from one bLLC tile. So the 288 MB number looks great on paper, but for gaming specifically, you’re probably looking at 144 MB of usable cache per tile. Still a big number, but it narrows the gap with AMD’s single-CCD X3D chips considerably.

What This Means for Builders in Late 2026
If you’re planning a build right now, this is a genuinely exciting time to wait. The AMD Ryzen 9950X3D2 is available today and already delivers incredible cache-rich performance. Intel’s Nova Lake-S with bLLC is expected in the second half of 2026, and if the leaks hold up, it could shift the balance again.
But the competition doesn’t stop there. AMD is already working on Zen 6 “Olympic Ridge,” and recent leaks suggest Zen 6 V-Cache could also reach 144 MB per die, potentially matching Intel’s 288 MB total. So whatever lead Intel gains with Nova Lake could be short-lived.
For now, here’s the takeaway. Intel is finally treating cache as a first-class feature on desktop, not just a server thing. AMD’s 3D V-Cache forced their hand, and the result is a genuine arms race. If you’re on AM5, you have a great upgrade path today. If you’re willing to wait for a new platform and want to see how Intel’s bLLC performs in practice, Nova Lake-S is worth keeping an eye on. Either way, builders win when both sides are pushing this hard.
If you’re already dealing with thread scheduling and optimization fixes on current asymmetric cache setups, symmetric bLLC across both tiles is one of the more practical improvements Nova Lake brings. It’s not just about the headline cache number. It’s about making that cache easier for your system to actually use.